[By NBC-1TV H. J Yook]Cortina Systems, Inc. (Cortina®), delivering innovative technologies that link people and networks worldwide, today announced the availability of the industry‘s first dual 15G Electronic Dispersion Compensation (EDC) PHY for low port count applications transitioning from 1 to 10 and 15G. The CS4227 Dual 15G EDC PHY device and its companion chip, the CS4223 Quad 15G EDC PHY, extend Cortina’s 28 nm portfolio with architecture designed to drive dramatically lower power and support higher bandwidth for the expanding lower port count application market, such as uplinks and NIC cards.

“While many eyes are on the ramp of 40G Ethernet in the mega data centers, one might miss that 10G Ethernet links will soon pass mainstream Gigabit Ethernet links in actual deployment volume,” commented Dale Murray, Principal Analyst at LightCounting, a leading optical communications market research company. “10 GbE is achieving these volumes in part by expanding into the smaller port count, but more mainstream data centers.”

“With the integration and innovation happening throughout the network, system vendors are looking to upgrade to 10G and 15G speeds to increase the bandwidth and unleash the power of their networks,” said Scott Feller, director at Cortina Systems, Inc. “Cortina's CS4227 and CS4223 PHYs extend the 28 nm portfolio of low latency, power, and cost, to lower port count applications.”

The CS4223 Quad EDC PHY functionality supports four full duplex 10G links, or one full duplex 40G link. The device-wide operating frequency range covers 1 GbE, 10 GbE, 1G FC, 2G FC, 4G FC, 8G, 16G FC, Infiniband SDR, DDR, QDR and FDR, and CPRI Options 1 to 7. EDC capability allows the device to operate with linear SFP+/QSFP optical modules to Direct Attach Copper, 10GBase-ZR, and DWDM SMF applications. The device is fully compliant to 10G SFP+, 802.3ba 40G and 100G nPPI, and nAUI specifications. The fully autonomous device does not require external processors to control the convergence or dynamic adaption of the dispersion compensation. The CS422x Dual and Quad EDC PHY also integrates the auto-negotiation and coefficient training functionality for 10G KR, 40G KR4, 40G CR4, and 16G Fibre channel, for seamless interoperability with existing equipment.

The CS422x Dual and Quad EDC PHY includes an integrated 2x2 switch, enabling redundant backplane and faceplate applications without needing an external crossbar device. The integrated switch functionality supports 1+1 protection switching and broadcast functionality in both directions. In addition, the CS422x PHY has a fully symmetric architecture with EDC capability on both ingress and egress directions. This enables applications such as translation from backplane to CR4 cable in blade server designs using a single device, reducing system cost.

The CS422x Dual and Quad EDC PHY has integrated AC coupling capacitors. The device also includes capabilities such as real time eye monitoring, loopbacks, PRBS generators and checkers, and hardware interrupt and GPIO pins for test and debug purposes.

The CS422x Dual and Quad EDC PHY continue the 28 nm portfolio with a baseline architecture leading the industry with less than 1 nsec latency in a 12 mm x 12 mm package, while lowering power consumption by 50% over previous generations. The CS4223 and CS4227 PHYs provide a wide operating frequency range from 1 to 15 Gbps, and support for all the major standards used in data centers, storage, high performance computing, and wireless backhaul applications including 1 GbE, 10 GbE, 40 GbE, InfiniBand, Fibre Channel, CPRI, and OBSAI. This comprehensive capability allows system designers to solve a wide range of applications with the same device.